Esp32 Ethernet Rmii Phy

---
name: esp32-ethernet-rmii-phy
description: Use when connecting an ESP32 Ethernet MAC to an external RMII PHY such as LAN8720 or IP101 and debugging clock, straps or link negotiation.
license: MIT
---

# ESP32 Ethernet Rmii Phy

RMII Ethernet integration requires a MAC, a PHY, a reference clock and correct board routing. A PHY such as LAN8720 does not replace the MAC. MAC availability is SoC-specific and must be checked against the target datasheet.

## MAC and PHY distinction

- Identify whether the selected SoC contains an Ethernet MAC. Do not infer capability from the ESP32 family name.
- Select a supported PHY and verify RMII/MII mode, address straps, reset timing and reference-clock direction.
- Check whether the 50 MHz clock is generated by the PHY or supplied externally; do not drive two clock sources onto the same net.
- Verify the ESP-IDF Ethernet driver and PHY component version.

## Pin and clock planning

- Map MDC, MDIO, TXD0/1, TX_EN, RXD0/1, CRS_DV, REF_CLK and reset before selecting GPIOs.
- Cross-check strapping pins, flash/PSRAM pins, input/output capability and board routing for the exact module.
- RMII clock integrity is a PCB/layout issue as well as a firmware setting.
- Confirm PHY address straps electrically at reset, not only from schematic labels.

## Bring-up sequence

- Hold PHY in reset until rails and reference clock are stable as required by its datasheet.
- Initialize MAC/PHY, read PHY ID, configure negotiation and wait for link with a bounded timeout.
- Only after link is established, test DHCP, DNS and application sockets.
- Record link speed/duplex and negotiated state where available.

## Failure isolation

| Symptom | First checks |
|---|---|
| PHY ID read fails | MDIO pull-up, address, reset, clock |
| Link never rises | magnetics, cable, PHY straps, partner |
| Link rises, no DHCP | MAC driver, packet path, VLAN/DHCP |
| Intermittent packets | REF_CLK quality, routing, power, EMI |

## Agent rules

- Treat MAC presence as a per-SoC fact backed by datasheet.
- Include a complete pin/clock table and PHY part number.
- Never copy LAN8720 pin maps between boards without verifying straps and clock topology.
- Keep PHY link diagnostics separate from IP-layer diagnostics.