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Claude Skills by Manoj-11-Dahal
github.com/Manoj-11-Dahal15,860 skills0 installs0 views
- Pcb Design Rule Exception Scope Intake GateUse when a new PCB design-rule exception governance request needs a bounded work scope to produce a scoped intake card for the rule-exception disposition list. Success means owner, objective, permitted sources, acceptance condition, exclusions, and deadline are explicit; each exception is tied to the current revision and no warning is suppressed without approval. Use configured search, fetch, read, browser, test, and write capabilities only when relevant and authorized. Record evidence, limit...Votes: 0GitHub stars: 2
- Pcb Design Rule Exception Source Provenance LedgerUse when a decision about PCB design-rule exception governance depends on facts from several records or public sources to produce a source-to-claim provenance ledger for the rule-exception disposition list. Success means each material claim has a source, version/date, location, and confidence note; each exception is tied to the current revision and no warning is suppressed without approval. Use configured search, fetch, read, browser, test, and write capabilities only when relevant and author...Votes: 0GitHub stars: 2
- Pcb Design Rule Exception Threshold Rule CheckUse when a PCB design-rule exception governance decision depends on a limit, eligibility rule, policy, or target to produce a rule-check record for the rule-exception disposition list showing source, units, boundary case, and outcome. Success means the rule source and effective date are verified, units and scope match, and borderline cases are flagged rather than auto-approved; each exception is tied to the current revision and no warning is suppressed without approval. Use configured search,...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Approval Evidence PacketUse when a PCB stackup and impedance constraint provenance result is ready for a human owner to approve, reject, or redirect to produce a decision packet for the stackup constraint register containing options, evidence, risks, and open questions. Success means the decision owner, requested decision, source evidence, alternatives, uncertainty, and consequence of no action are all visible; every controlled constraint has a source and current board revision. Use configured search, fetch, read, b...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Change Impact TraceUse when a version, rule, source, or stakeholder change may affect PCB stackup and impedance constraint provenance to produce a before/after change record and impact map for the stackup constraint register. Success means each material difference is tied to affected dependencies, consumers, owners, and a test or explicitly unknown impact; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, test, and write capabilities only when rele...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Closeout Handoff LedgerUse when a PCB stackup and impedance constraint provenance work item is nearing completion, pause, or transfer to another owner to produce a closeout ledger for the stackup constraint register with status, evidence, owner, and retention state. Success means all deliverables, unresolved items, approvals, and next owners are recorded, and the stop reason is explicit; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, test, and write...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Completeness ReconciliationUse when the PCB stackup and impedance constraint provenance workflow receives records that must agree across sources, periods, or statuses to produce a reconciliation worksheet for the stackup constraint register with matched, unmatched, and unresolved rows. Success means counts and key fields reconcile or every variance is quantified, sourced, and left unresolved for an owner; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, t...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Exception Triage QueueUse when the PCB stackup and impedance constraint provenance workflow has exceptions, missing evidence, or competing priorities to produce a prioritized exception queue for the stackup constraint register with evidence, owner, and next action. Success means every exception has a severity rationale, source, owner or explicit unassigned state, and a bounded next step; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, test, and writ...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Recovery Readiness DrillUse when the PCB stackup and impedance constraint provenance workflow needs a safe recovery, rollback, replay, or continuity check to produce a recovery-drill record for the stackup constraint register with starting state, test, and observed outcome. Success means the dry-run or approved non-production drill meets the predeclared recovery target and leaves the baseline intact; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, tes...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Scenario Sensitivity MatrixUse when the PCB stackup and impedance constraint provenance team needs to compare options under changing assumptions to produce a baseline-plus-scenarios matrix for the stackup constraint register with assumptions and ranges. Success means the baseline is reproducible, scenario inputs are explicit, comparable units are used, and conclusions state uncertainty; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, test, and write capa...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Scope Intake GateUse when a new PCB stackup and impedance constraint provenance request needs a bounded work scope to produce a scoped intake card for the stackup constraint register. Success means owner, objective, permitted sources, acceptance condition, exclusions, and deadline are explicit; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, test, and write capabilities only when relevant and authorized. Record evidence, limit refinement to thr...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Source Provenance LedgerUse when a decision about PCB stackup and impedance constraint provenance depends on facts from several records or public sources to produce a source-to-claim provenance ledger for the stackup constraint register. Success means each material claim has a source, version/date, location, and confidence note; every controlled constraint has a source and current board revision. Use configured search, fetch, read, browser, test, and write capabilities only when relevant and authorized. Record evide...Votes: 0GitHub stars: 2
- Pcb Design Stackup Constraint Threshold Rule CheckUse when a PCB stackup and impedance constraint provenance decision depends on a limit, eligibility rule, policy, or target to produce a rule-check record for the stackup constraint register showing source, units, boundary case, and outcome. Success means the rule source and effective date are verified, units and scope match, and borderline cases are flagged rather than auto-approved; every controlled constraint has a source and current board revision. Use configured search, fetch, read, brow...Votes: 0GitHub stars: 2
- Pcb Layout Fabrication ReviewUse when a task involves checking PCB placement, routing, stackup, manufacturing files, and assembly outputs before a fabrication release to identify the intended outcome, relevant inputs, platform or version, sensitive data, and permission boundary before acting. Use current primary documentation for version-sensitive behavior, produce a reviewable artifact, and verify it against stated criteria. Trigger for planning, implementation, evaluation, or troubleshooting in this focused domain; do ...Votes: 0GitHub stars: 2
- Physical Ai Sensor Data ValidationUse when a task involves validating sensor streams and synchronization for a physical-AI or robotics data pipeline to identify the research or operational question, target population or system, relevant version, sensitive data, and approval boundary before acting. Use current primary sources, produce a traceable artifact, and verify it against explicit criteria. Trigger for planning, analysis, review, or troubleshooting in this focused domain; do not execute external writes or clinical action...Votes: 0GitHub stars: 2
- Post Layout Parasitic Impact AuditUse when a task involves assessing how extracted interconnect changes an analog block's predicted behavior to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financi...Votes: 0GitHub stars: 2
- Reset Domain Crossing Verification PlanUse when a task involves reviewing reset-domain crossings and release sequencing in RTL to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-contro...Votes: 0GitHub stars: 2
- Rtl Lint TriageUse when a task involves triaging RTL lint findings into real defects, intentional patterns, and tool noise to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financ...Votes: 0GitHub stars: 2
- Scan Test Dft Architecture PlanningUse when a task involves planning scan and testability structures for a digital chip block to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-con...Votes: 0GitHub stars: 2
- Semiconductor Chip Design VerificationUse when a task involves planning verification for a digital or mixed-signal chip design from requirements through simulation and sign-off evidence to identify the intended outcome, relevant inputs, platform or version, sensitive data, and permission boundary before acting. Use current primary documentation for version-sensitive behavior, produce a reviewable artifact, and verify it against stated criteria. Trigger for planning, implementation, evaluation, or troubleshooting in this focused d...Votes: 0GitHub stars: 2
- Semiconductor Equipment Data QualityUse when a task involves auditing equipment and sensor data before process analytics to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-control, ...Votes: 0GitHub stars: 2
- Semiconductor Knowledge Graph Ontology DesignUse when a task involves designing a traceable ontology for semiconductor materials, tools, processes, and outcomes to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production...Votes: 0GitHub stars: 2
- Semiconductor Process Control MonitoringUse when a task involves reviewing semiconductor process-control trends and alert thresholds to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-c...Votes: 0GitHub stars: 2
- Semiconductor Wafer Yield AnalysisUse when a task involves analyzing semiconductor manufacturing yield with explicit sampling and denominator definitions to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform produc...Votes: 0GitHub stars: 2
- Sensor Stream Clock Alignment AuditUse when a task involves auditing timestamp alignment across heterogeneous IoT sensor feeds to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, device-cont...Votes: 0GitHub stars: 2
- Silicon Bringup Test PlanningUse when a task involves planning first-silicon checks from safe power-on to functional characterization to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial...Votes: 0GitHub stars: 2
- Spacecraft Antenna Coverage ReviewUse when a task involves reviewing antenna coverage and pointing losses across spacecraft attitudes to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, har...Votes: 0GitHub stars: 2
- Spacecraft Assembly Integration Test ReadinessUse when a task involves checking readiness for spacecraft assembly, integration, and verification activities to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, fina...Votes: 0GitHub stars: 2
- Spacecraft Attitude Sensor SelectionUse when a task involves comparing attitude sensors against pointing and mission-mode needs to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-co...Votes: 0GitHub stars: 2
- Spacecraft Commissioning Sequence DesignUse when a task involves planning an initial on-orbit checkout sequence with reversible steps and stop gates to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, finan...Votes: 0GitHub stars: 2
- Spacecraft Data Rate And Storage BudgetUse when a task involves reconciling payload data generation with onboard storage and downlink capacity to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial,...Votes: 0GitHub stars: 2
- Spacecraft Delta V Reserve AccountingUse when a task involves reviewing a spacecraft maneuver budget and its reserve assumptions to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-co...Votes: 0GitHub stars: 2
- Spacecraft Eclipse Energy Budget ReviewUse when a task involves checking spacecraft battery and load margins through eclipse seasons to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-...Votes: 0GitHub stars: 2
- Spacecraft End Of Life Passivation ReviewUse when a task involves reviewing disposal and passivation measures for a spacecraft at end of mission to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial,...Votes: 0GitHub stars: 2
- Spacecraft Fault Detection Isolation Recovery ReviewUse when a task involves reviewing onboard fault detection and recovery logic for spacecraft subsystems to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial,...Votes: 0GitHub stars: 2
- Spacecraft Ground Pass SchedulingUse when a task involves planning ground contacts against station visibility and mission priorities to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, har...Votes: 0GitHub stars: 2
- Spacecraft Launch Load Envelope ReviewUse when a task involves reviewing structural load cases and interfaces for launch environments to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardwar...Votes: 0GitHub stars: 2
- Spacecraft Mass Budget Margin AuditUse when a task involves auditing spacecraft mass estimates, growth allowance, and margin by maturity to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, h...Votes: 0GitHub stars: 2
- Spacecraft Radiation Dose ScreeningUse when a task involves screening component total ionizing dose against the mission radiation environment to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financi...Votes: 0GitHub stars: 2
- Spacecraft Rf Link Margin ReviewUse when a task involves auditing a spacecraft RF link budget for a specified pass or mission phase to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, har...Votes: 0GitHub stars: 2
- Spacecraft Single Event Effects ReviewUse when a task involves reviewing single-event upset, latchup, and transient risks in spacecraft electronics to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, fina...Votes: 0GitHub stars: 2
- Spacecraft Structural Load Case TraceabilityUse when a task involves tracing spacecraft structural analysis loads to source requirements and model evidence to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, fi...Votes: 0GitHub stars: 2
- Spacecraft Thermal Coating Sensitivity ReviewUse when a task involves testing spacecraft thermal predictions against uncertain surface optical properties to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, finan...Votes: 0GitHub stars: 2
- Spacecraft Thermal Vacuum Test MatrixUse when a task involves planning thermal-vacuum test conditions and evidence for a spacecraft assembly to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial,...Votes: 0GitHub stars: 2
- Spacecraft Wheel Desaturation AssessmentUse when a task involves assessing momentum buildup and wheel desaturation needs in a spacecraft to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardwa...Votes: 0GitHub stars: 2
- Spice Circuit SimulationUse when a task involves setting up a SPICE simulation to test a circuit hypothesis or estimate behavior under explicit assumptions to identify the intended outcome, relevant inputs, platform or version, sensitive data, and permission boundary before acting. Use current primary documentation for version-sensitive behavior, produce a reviewable artifact, and verify it against stated criteria. Trigger for planning, implementation, evaluation, or troubleshooting in this focused domain; do not in...Votes: 0GitHub stars: 2
- Static Timing Constraint AuditUse when a task involves auditing timing constraints for a synchronous digital design to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-control,...Votes: 0GitHub stars: 2
- Transistor Model Provenance AuditUse when a task involves checking the origin and configuration of transistor models used for a design result to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, finan...Votes: 0GitHub stars: 2
- Wafer Map Spatial Defect AnalysisUse when a task involves examining spatial patterns in wafer-level defect or yield data to define the target, lifecycle stage, controlling artifact, authoritative evidence, version or operating conditions, sensitivity, and approval boundary before applying the method. Separate observed facts from assumptions and model output. Verify the result with appropriate independent checks, preserve provenance, and report uncertainty and limitations. Do not perform production, financial, hardware-contro...Votes: 0GitHub stars: 2
- Climate Ops Adaptation Approval Evidence PacketUse when a climate adaptation project readiness result is ready for a human owner to approve, reject, or redirect to produce a decision packet for the adaptation project dependency map containing options, evidence, risks, and open questions. Success means the decision owner, requested decision, source evidence, alternatives, uncertainty, and consequence of no action are all visible; each benefit claim has a measure and uncertainty note; implementation remains with the authorized owner. Use co...Votes: 0GitHub stars: 2