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Claude Skills by a5c-ai
github.com/a5c-ai2,120 skills40 installs3,476 views
- Communication ProtocolsImplement and debug embedded communication protocols including I2C, SPI, UART, CAN, and Ethernet.Votes: 0GitHub stars: 1,760
- Embedded CryptoEmbedded cryptographic operations and secure element integration. Expert skill for hardware crypto accelerators, secure key storage, TrustZone configuration, and side-channel attack mitigation.Votes: 0GitHub stars: 1,760
- Embedded DocsEmbedded firmware documentation generation and maintenance using Doxygen and related tools. Expert skill for API documentation, hardware interface documentation, memory maps, and integration with documentation systems.Votes: 0GitHub stars: 1,760
- Environmental Stress TestingDesign and execute environmental stress tests for embedded hardware — temperature cycling, vibration, humidity, and EMC validation.Votes: 0GitHub stars: 1,760
- Firmware TestingUnit and integration testing for embedded firmware — mock hardware, HIL testing, and continuous firmware validation pipelines.Votes: 0GitHub stars: 1,760
- Hardware Interface TestingTest hardware interfaces and peripheral drivers including GPIO, ADC, DAC, and communication bus validation.Votes: 0GitHub stars: 1,760
- Jtag Swd DebugDeep integration with JTAG/SWD debug probes for hardware-level debugging and flash programmingVotes: 0GitHub stars: 1,760
- Linker ScriptGNU linker script generation and optimization for embedded systems. Expert skill for memory layout definition, section placement, multi-image linking, and memory protection configuration.Votes: 0GitHub stars: 1,760
- Memory AnalysisEmbedded memory analysis, optimization, and leak detectionVotes: 0GitHub stars: 1,760
- Misra C AnalysisMISRA C compliance checking and static analysis integrationVotes: 0GitHub stars: 1,760
- Motor ControlMotor control algorithms and driver implementationVotes: 0GitHub stars: 1,760
- Nordic NrfNordic Semiconductor nRF5x/nRF Connect SDK expertiseVotes: 0GitHub stars: 1,760
- Ota Firmware UpdateOver-the-air firmware update implementation expertise for embedded systems. Expert skill for delta updates, image signing, update protocols, partition management, and rollback mechanisms.Votes: 0GitHub stars: 1,760
- Power Consumption TestingMeasure and validate power consumption in embedded systems across sleep modes, active states, and peripheral usage.Votes: 0GitHub stars: 1,760
- Power ProfilerPower consumption measurement and analysis expertise for embedded systems. Integrates with power analyzer tools to measure, profile, and optimize power consumption in battery-powered and energy-efficient designs.Votes: 0GitHub stars: 1,760
- Protocol AnalyzerSerial protocol analysis and debugging for common embedded interfaces (I2C, SPI, UART)Votes: 0GitHub stars: 1,760
- Protocol Conformance TestingValidate protocol conformance for embedded communication stacks — USB, CAN, Modbus, MQTT, and industry-standard protocol compliance.Votes: 0GitHub stars: 1,760
- Real Time Behavior TestingValidate real-time behavior in embedded systems — timing constraints, interrupt latency, and RTOS task scheduling verification.Votes: 0GitHub stars: 1,760
- Safety Critical TestingImplement safety-critical testing for embedded systems per IEC 61508, ISO 26262, or DO-178C standards.Votes: 0GitHub stars: 1,760
- Scope Logic AnalyzerTest equipment integration for signal analysis (oscilloscope and logic analyzer)Votes: 0GitHub stars: 1,760
- Sensor LibrariesIntegrate and validate sensor libraries for embedded systems including IMUs, temperature, pressure, and proximity sensors.Votes: 0GitHub stars: 1,760
- Stm32 HalSTMicroelectronics STM32 HAL and Low-Level driver expertiseVotes: 0GitHub stars: 1,760
- Unity Ceedling TestEmbedded unit testing with Unity framework and CMockVotes: 0GitHub stars: 1,760
- Usb StackUSB device and host stack implementation expertiseVotes: 0GitHub stars: 1,760
- Wireless ProtocolsEmbedded wireless protocol implementation (LoRa, Zigbee, Thread, Matter)Votes: 0GitHub stars: 1,760
- Zephyr RtosSpecialized skill for Zephyr RTOS development and configurationVotes: 0GitHub stars: 1,760
- Axi ProtocolExpert skill for AMBA AXI protocol implementation and verification in FPGA designsVotes: 0GitHub stars: 1,760
- Cdc AnalysisSpecialized skill for clock domain crossing analysis and synchronizer design in FPGA designsVotes: 0GitHub stars: 1,760
- Formal VerificationFormal property verification and model checking skill for FPGA designsVotes: 0GitHub stars: 1,760
- Fpga DebuggingOn-chip debugging skill with ILA, VIO, and related FPGA debug toolsVotes: 0GitHub stars: 1,760
- Fsm DesignSpecialized skill for finite state machine design and optimization in FPGAsVotes: 0GitHub stars: 1,760
- Hardware Verification UvmImplement UVM-based hardware verification testbenches — stimulus generation, scoreboarding, coverage-driven verification, and assertion-based testing.Votes: 0GitHub stars: 1,760
- Hdl SimulationMulti-simulator expertise for functional verification of FPGA designsVotes: 0GitHub stars: 1,760
- Hls Cpp To RtlExpert skill for C/C++ to RTL conversion using High-Level Synthesis toolsVotes: 0GitHub stars: 1,760
- Memory InterfacesExpert skill for on-chip and external memory interface design in FPGAsVotes: 0GitHub stars: 1,760
- Place And RouteExpert skill for FPGA place and route optimization and physical implementationVotes: 0GitHub stars: 1,760
- Power AnalysisFPGA power estimation and optimization skill for low-power designVotes: 0GitHub stars: 1,760
- Rtl LintingRTL code quality checking and linting. Runs lint rules, identifies synthesis issues, detects inferred latches, and generates lint reports with waivers.Votes: 0GitHub stars: 1,760
- Sva AssertionsSpecialized skill for creating and debugging SystemVerilog assertions for FPGA verificationVotes: 0GitHub stars: 1,760
- Synthesis OptimizationExpertise in RTL optimization for FPGA synthesis tools. Analyzes synthesis reports, applies attributes, and guides resource inference for optimal QoR.Votes: 0GitHub stars: 1,760
- Timing ConstraintsExpert skill for developing and validating timing constraints. Writes SDC (Synopsys Design Constraints) and XDC files for FPGA timing closure.Votes: 0GitHub stars: 1,760
- Uvm MethodologyDeep expertise in Universal Verification Methodology (IEEE 1800.2) for FPGA verificationVotes: 0GitHub stars: 1,760
- Verilog Sv LanguageExpert-level Verilog and SystemVerilog knowledge following IEEE 1800 standards. Generates synthesizable RTL code with proper coding styles and constructs.Votes: 0GitHub stars: 1,760
- Vhdl LanguageDeep expertise in VHDL language constructs, IEEE 1076 standard compliance, and synthesis coding guidelines. Expert skill for generating synthesizable VHDL code.Votes: 0GitHub stars: 1,760
- Ab TestingA/B testing skill for player segmentation.Votes: 0GitHub stars: 1,760
- Accessibility GamesGame accessibility skill for colorblind modes and control remapping.Votes: 0GitHub stars: 1,760
- Adaptive MusicAdaptive music skill for horizontal/vertical resequencing and stingers.Votes: 0GitHub stars: 1,760
- Animation BlendingAnimation blending skill for blend trees.Votes: 0GitHub stars: 1,760
- Animation RiggingCharacter rigging skill for IK constraints.Votes: 0GitHub stars: 1,760
- Animation State MachinesAnimation state machine skill for transitions.Votes: 0GitHub stars: 1,760