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Claude Skills by Manoj-11-Dahal
github.com/Manoj-11-Dahal15,860 skills0 installs0 views
- Pcblab Schematic Capture Emc Pre Compliance Security Rights And Safety ReviewUse when the workflow could affect people, systems, confidential data, intellectual property, or physical outcomes for PCB and electronics design: schematic capture for EMC pre-compliance. Produce a scoped risk-and-control review with scope, versions, decisions, and evidence for this task-specific gate: Use a defined pre-compliance setup and note limits; do not describe a simulation or bench check as certification. Success means the review names relevant hazards, permissions, controls, eviden...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Emc Pre Compliance Source Research And Provenance LedgerUse when a decision depends on current, source-grounded information for PCB and electronics design: schematic capture for EMC pre-compliance. Produce a source-and-claim ledger with scope, versions, decisions, and evidence for this task-specific gate: Use a defined pre-compliance setup and note limits; do not describe a simulation or bench check as certification. Success means material claims are linked to current primary sources with dates and limitations. Use permissioned inputs, preserve a ...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Emc Pre Compliance Verification And Acceptance Test PlanUse when a result must be checked against explicit behavior, safety, or quality conditions for PCB and electronics design: schematic capture for EMC pre-compliance. Produce a risk-weighted verification plan with saved evidence with scope, versions, decisions, and evidence for this task-specific gate: Use a defined pre-compliance setup and note limits; do not describe a simulation or bench check as certification. Success means each critical requirement maps to a reproducible check and a truthf...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Build Configuration RunbookUse when an authorized implementation needs repeatable steps and a visible change boundary for PCB and electronics design: schematic capture for high-speed interfaces. Produce a bounded build or configuration runbook with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means the prepared result is reproducible, reviewable, and within the a...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Design BlueprintUse when a solution needs a coherent structure before implementation or production for PCB and electronics design: schematic capture for high-speed interfaces. Produce a staged design blueprint with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means interfaces, dependencies, constraints, and review points are testable before build. Use ...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Failure Triage And RecoveryUse when an unexpected result needs diagnosis without widening risk or losing evidence for PCB and electronics design: schematic capture for high-speed interfaces. Produce a failure-triage record and reversible recovery plan with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means the failure is bounded by observations, one testable hypo...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Option Comparison MatrixUse when several tools, designs, methods, or workflows could satisfy the same need for PCB and electronics design: schematic capture for high-speed interfaces. Produce an evidence-backed option-comparison matrix with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means options are compared on user-approved criteria with uncertainty and tr...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Requirements And Decision BriefUse when a request must be converted into testable constraints and an owned decision for PCB and electronics design: schematic capture for high-speed interfaces. Produce a reviewable requirements and decision brief with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means requirements have priorities, evidence, owners, and measurable acce...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Scope And Baseline RecordUse when the work needs a verified goal, authorized boundary, and starting state for PCB and electronics design: schematic capture for high-speed interfaces. Produce a scope-and-baseline record with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means the owner, constraints, baseline, and acceptance signal are explicit. Use permissioned i...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Security Rights And Safety ReviewUse when the workflow could affect people, systems, confidential data, intellectual property, or physical outcomes for PCB and electronics design: schematic capture for high-speed interfaces. Produce a scoped risk-and-control review with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means the review names relevant hazards, permissions, c...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Source Research And Provenance LedgerUse when a decision depends on current, source-grounded information for PCB and electronics design: schematic capture for high-speed interfaces. Produce a source-and-claim ledger with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means material claims are linked to current primary sources with dates and limitations. Use permissioned inpu...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture High Speed Interfaces Verification And Acceptance Test PlanUse when a result must be checked against explicit behavior, safety, or quality conditions for PCB and electronics design: schematic capture for high-speed interfaces. Produce a risk-weighted verification plan with saved evidence with scope, versions, decisions, and evidence for this task-specific gate: Verify the relevant interface constraints against the selected transceiver, stackup, reference plane, and current datasheets. Success means each critical requirement maps to a reproducible che...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Build Configuration RunbookUse when an authorized implementation needs repeatable steps and a visible change boundary for PCB and electronics design: schematic capture for low-noise analog. Produce a bounded build or configuration runbook with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means the prepared result is reproducible, reviewable, and within the approved scope. Us...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Design BlueprintUse when a solution needs a coherent structure before implementation or production for PCB and electronics design: schematic capture for low-noise analog. Produce a staged design blueprint with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means interfaces, dependencies, constraints, and review points are testable before build. Use permissioned inpu...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Failure Triage And RecoveryUse when an unexpected result needs diagnosis without widening risk or losing evidence for PCB and electronics design: schematic capture for low-noise analog. Produce a failure-triage record and reversible recovery plan with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means the failure is bounded by observations, one testable hypothesis, and a saf...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Measured Improvement And HandoffUse when a measured result or recurring failure suggests a change worth testing and handing to an owner for PCB and electronics design: schematic capture for low-noise analog. Produce a versioned improvement proposal and handoff packet with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means the proposed change is compared with a baseline, regressio...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Option Comparison MatrixUse when several tools, designs, methods, or workflows could satisfy the same need for PCB and electronics design: schematic capture for low-noise analog. Produce an evidence-backed option-comparison matrix with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means options are compared on user-approved criteria with uncertainty and trade-offs shown. U...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Requirements And Decision BriefUse when a request must be converted into testable constraints and an owned decision for PCB and electronics design: schematic capture for low-noise analog. Produce a reviewable requirements and decision brief with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means requirements have priorities, evidence, owners, and measurable acceptance conditions...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Scope And Baseline RecordUse when the work needs a verified goal, authorized boundary, and starting state for PCB and electronics design: schematic capture for low-noise analog. Produce a scope-and-baseline record with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means the owner, constraints, baseline, and acceptance signal are explicit. Use permissioned inputs, preserve a...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Security Rights And Safety ReviewUse when the workflow could affect people, systems, confidential data, intellectual property, or physical outcomes for PCB and electronics design: schematic capture for low-noise analog. Produce a scoped risk-and-control review with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means the review names relevant hazards, permissions, controls, evidence...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Source Research And Provenance LedgerUse when a decision depends on current, source-grounded information for PCB and electronics design: schematic capture for low-noise analog. Produce a source-and-claim ledger with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means material claims are linked to current primary sources with dates and limitations. Use permissioned inputs, preserve a ba...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Low Noise Analog Verification And Acceptance Test PlanUse when a result must be checked against explicit behavior, safety, or quality conditions for PCB and electronics design: schematic capture for low-noise analog. Produce a risk-weighted verification plan with saved evidence with scope, versions, decisions, and evidence for this task-specific gate: Identify noise-sensitive nodes, return paths, coupling risks, and measurement assumptions for the actual circuit. Success means each critical requirement maps to a reproducible check and a truthful...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Build Configuration RunbookUse when an authorized implementation needs repeatable steps and a visible change boundary for PCB and electronics design: schematic capture for manufacturing capability. Produce a bounded build or configuration runbook with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means the prepared result is reproducible, reviewable, and within the approved scop...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Design BlueprintUse when a solution needs a coherent structure before implementation or production for PCB and electronics design: schematic capture for manufacturing capability. Produce a staged design blueprint with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means interfaces, dependencies, constraints, and review points are testable before build. Use permissioned...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Failure Triage And RecoveryUse when an unexpected result needs diagnosis without widening risk or losing evidence for PCB and electronics design: schematic capture for manufacturing capability. Produce a failure-triage record and reversible recovery plan with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means the failure is bounded by observations, one testable hypothesis, and ...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Option Comparison MatrixUse when several tools, designs, methods, or workflows could satisfy the same need for PCB and electronics design: schematic capture for manufacturing capability. Produce an evidence-backed option-comparison matrix with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means options are compared on user-approved criteria with uncertainty and trade-offs sho...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Requirements And Decision BriefUse when a request must be converted into testable constraints and an owned decision for PCB and electronics design: schematic capture for manufacturing capability. Produce a reviewable requirements and decision brief with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means requirements have priorities, evidence, owners, and measurable acceptance condi...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Scope And Baseline RecordUse when the work needs a verified goal, authorized boundary, and starting state for PCB and electronics design: schematic capture for manufacturing capability. Produce a scope-and-baseline record with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means the owner, constraints, baseline, and acceptance signal are explicit. Use permissioned inputs, prese...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Security Rights And Safety ReviewUse when the workflow could affect people, systems, confidential data, intellectual property, or physical outcomes for PCB and electronics design: schematic capture for manufacturing capability. Produce a scoped risk-and-control review with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means the review names relevant hazards, permissions, controls, evi...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Source Research And Provenance LedgerUse when a decision depends on current, source-grounded information for PCB and electronics design: schematic capture for manufacturing capability. Produce a source-and-claim ledger with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means material claims are linked to current primary sources with dates and limitations. Use permissioned inputs, preserve...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Manufacturing Capability Verification And Acceptance Test PlanUse when a result must be checked against explicit behavior, safety, or quality conditions for PCB and electronics design: schematic capture for manufacturing capability. Produce a risk-weighted verification plan with saved evidence with scope, versions, decisions, and evidence for this task-specific gate: Compare design outputs with the chosen fabricator's current capability table and obtain review for exceptions. Success means each critical requirement maps to a reproducible check and a tru...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Build Configuration RunbookUse when an authorized implementation needs repeatable steps and a visible change boundary for PCB and electronics design: schematic capture for power integrity. Produce a bounded build or configuration runbook with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means the prepared result is reproducible, reviewable, and within the approved scope. Use...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Design BlueprintUse when a solution needs a coherent structure before implementation or production for PCB and electronics design: schematic capture for power integrity. Produce a staged design blueprint with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means interfaces, dependencies, constraints, and review points are testable before build. Use permissioned input...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Failure Triage And RecoveryUse when an unexpected result needs diagnosis without widening risk or losing evidence for PCB and electronics design: schematic capture for power integrity. Produce a failure-triage record and reversible recovery plan with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means the failure is bounded by observations, one testable hypothesis, and a safe...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Measured Improvement And HandoffUse when a measured result or recurring failure suggests a change worth testing and handing to an owner for PCB and electronics design: schematic capture for power integrity. Produce a versioned improvement proposal and handoff packet with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means the proposed change is compared with a baseline, regression...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Option Comparison MatrixUse when several tools, designs, methods, or workflows could satisfy the same need for PCB and electronics design: schematic capture for power integrity. Produce an evidence-backed option-comparison matrix with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means options are compared on user-approved criteria with uncertainty and trade-offs shown. Us...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Requirements And Decision BriefUse when a request must be converted into testable constraints and an owned decision for PCB and electronics design: schematic capture for power integrity. Produce a reviewable requirements and decision brief with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means requirements have priorities, evidence, owners, and measurable acceptance conditions....Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Scope And Baseline RecordUse when the work needs a verified goal, authorized boundary, and starting state for PCB and electronics design: schematic capture for power integrity. Produce a scope-and-baseline record with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means the owner, constraints, baseline, and acceptance signal are explicit. Use permissioned inputs, preserve a ...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Security Rights And Safety ReviewUse when the workflow could affect people, systems, confidential data, intellectual property, or physical outcomes for PCB and electronics design: schematic capture for power integrity. Produce a scoped risk-and-control review with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means the review names relevant hazards, permissions, controls, evidence ...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Source Research And Provenance LedgerUse when a decision depends on current, source-grounded information for PCB and electronics design: schematic capture for power integrity. Produce a source-and-claim ledger with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means material claims are linked to current primary sources with dates and limitations. Use permissioned inputs, preserve a bas...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Power Integrity Verification And Acceptance Test PlanUse when a result must be checked against explicit behavior, safety, or quality conditions for PCB and electronics design: schematic capture for power integrity. Produce a risk-weighted verification plan with saved evidence with scope, versions, decisions, and evidence for this task-specific gate: Record rail limits, transient/load assumptions, copper/thermal paths, and component ratings for the intended use. Success means each critical requirement maps to a reproducible check and a truthful ...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Build Configuration RunbookUse when an authorized implementation needs repeatable steps and a visible change boundary for PCB and electronics design: schematic capture for revision release. Produce a bounded build or configuration runbook with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means the prepared result is reproducible, reviewable, and within the approved scope....Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Design BlueprintUse when a solution needs a coherent structure before implementation or production for PCB and electronics design: schematic capture for revision release. Produce a staged design blueprint with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means interfaces, dependencies, constraints, and review points are testable before build. Use permissioned i...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Failure Triage And RecoveryUse when an unexpected result needs diagnosis without widening risk or losing evidence for PCB and electronics design: schematic capture for revision release. Produce a failure-triage record and reversible recovery plan with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means the failure is bounded by observations, one testable hypothesis, and a ...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Measured Improvement And HandoffUse when a measured result or recurring failure suggests a change worth testing and handing to an owner for PCB and electronics design: schematic capture for revision release. Produce a versioned improvement proposal and handoff packet with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means the proposed change is compared with a baseline, regres...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Option Comparison MatrixUse when several tools, designs, methods, or workflows could satisfy the same need for PCB and electronics design: schematic capture for revision release. Produce an evidence-backed option-comparison matrix with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means options are compared on user-approved criteria with uncertainty and trade-offs shown...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Requirements And Decision BriefUse when a request must be converted into testable constraints and an owned decision for PCB and electronics design: schematic capture for revision release. Produce a reviewable requirements and decision brief with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means requirements have priorities, evidence, owners, and measurable acceptance conditi...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Scope And Baseline RecordUse when the work needs a verified goal, authorized boundary, and starting state for PCB and electronics design: schematic capture for revision release. Produce a scope-and-baseline record with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means the owner, constraints, baseline, and acceptance signal are explicit. Use permissioned inputs, preserv...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Security Rights And Safety ReviewUse when the workflow could affect people, systems, confidential data, intellectual property, or physical outcomes for PCB and electronics design: schematic capture for revision release. Produce a scoped risk-and-control review with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means the review names relevant hazards, permissions, controls, evide...Votes: 0GitHub stars: 2
- Pcblab Schematic Capture Revision Release Source Research And Provenance LedgerUse when a decision depends on current, source-grounded information for PCB and electronics design: schematic capture for revision release. Produce a source-and-claim ledger with scope, versions, decisions, and evidence for this task-specific gate: Confirm project revision, schematic/board synchronization, fabrication plots, drill data, BOM, and release approval. Success means material claims are linked to current primary sources with dates and limitations. Use permissioned inputs, preserve a...Votes: 0GitHub stars: 2