Skip to content

Claude Skills by Eriemon

github.com/Eriemon

1 skillA× 10 installs0 views

readable-verilog-generatorAUse when creating, writing, reviewing, annotating, repairing, refactoring, or validating readable Verilog RTL, including synthesizable Verilog-2001 .v files, existing-RTL analysis, semantic comment annotation, testbench scaffold planning, ASIC-quality review, local or remote Vivado/xsim validation, evidence-backed repair, and workflow trace diagnosis.ai-agentspythongoVotes: 0GitHub stars: 259

Claude Skills by Eriemon — 1 skill, security-graded | Skills Directory